| CL(IDD) |
11 Cycles |
| Row Cycle Time |
48.125ns (min.) |
| Refresh to Active/Refresh |
260ns (min.) |
| Row Active Time (tRASmin) |
35ns (min.) |
| Maximum Operating Power |
(1.35V) = TBD W* |
| UL Rating |
94 V-0 |
| Operating Temperature |
0°C to 85°C |
| Storage Temperature |
-55\xC2\xB0C to +100\xC2\xB0C |
| VDDQ |
1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V) |
| Programmable CAS Latency |
11, 10, 9, 8, 7, 6 |
| Programmable Additive Latency |
0, CL - 2, or CL - 1 clock |
| Burst Length |
8 (Interleave without any limit, sequential with starting address \xE2\x80\x9C000\xE2\x80\x9D only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS] |
| Internal(self) calibration |
Internal self calibration through ZQ pin (RZQ : 240 ohm \xC2\xB1 1%) |
| PCB Height |
0.740\xE2\x80\x9D (18.75mm) or 1.180\xE2\x80\x9D (30.00mm) |
